Advantest Driving Formation of Industry-Wide Consortium Aimed at Establishing First Truly Open Architecture
Company working to bring together top chipmakers and suppliers to develop a highly scalable, flexible test platform with an expected lifetime of 10+ years
SEMICON WEST, San Jose, Calif. — July 17, 2002 — Advantest Corporation (NYSE: ATE, TSE 6857) today announced its plans to establish the Semiconductor Test Consortium-the first industry-wide collaboration aimed at solving the challenges of cost-effectively testing complex logic devices, such as systems-on-chip (SoCs). This nonprofit consortium is expected to focus on supporting the development of the Semiconductor Test Open Architecture, a new framework created to enable open test solutions that offer true hardware and software interoperability, with unparalleled technical and economic benefits. Advantest is presently recruiting participants for the consortium from the ranks of the world's leading integrated circuit (IC) manufacturers to enable the development of a highly scalable and flexible test platform with a lifetime of more than 10 years. Currently, Advantest has active participation from half of the world's top 10 semiconductor companies, involved in a working group committed to launching the consortium.
At 3:00 p.m. PDT today, at a press conference during SEMICON West, the company will share more details about the genesis of the planned architecture. The event will be held in the SEMI Press Conference Room at the San Jose Convention Center, where Advantest Corporation President and COO Toshio Maruyama and Advantest America President and CEO Nicholas Konidaris will be the featured speakers.
Rapid Technology Evolution Drives Need for Open Architecture
n today's semiconductor manufacturing environment, the introduction of copper interconnects, sub-0.13-micron device geometries, and 300mm wafers promise exciting performance, functionality and yield advancements for chipmakers and their customers-the electronics vendors who incorporate these complex SoCs into an array of communications, computing and consumer products. However, these advanced devices also place increased pressure on the test process, forcing automated test equipment (ATE) suppliers to contend with higher research and development costs, increasingly complex manufacturing processes, and tighter market windows.
Further, the rapid changes in semiconductor technology have, until now, often meant that chipmakers must invest in entirely new ATE systems every two to three years, or else risk testing leading-edge chips using older test technology. At the same time, the current lack of a truly open, interoperable ATE architecture makes it difficult for chipmakers to implement flexible ATE solutions that meet their divergent test needs in a cost-effective manner.
Recognizing the need for a common, industry-wide ATE architecture that is completely open, documented and supported via solutions available from all ATE vendors-and responding to positive feedback from several top global IC manufacturers-Advantest decided to launch the Semiconductor Test Consortium. Open to all companies throughout the semiconductor supply chain with a vested interest in the test sector, the consortium plans to focus on the following goals: driving the direction of the Semiconductor Test Open Architecture; publishing the architecture and providing training programs and workshops to ensure it is truly open; identifying requirements, developing solutions and defining and managing validation procedures to ensure full vendor interoperability; and engaging in joint marketing and promotion activities to educate the industry about the platform architecture and ensure its successful implementation.
According to Toshio Maruyama, president and COO of Advantest Corporation, "The establishment of the Semiconductor Test Consortium comes at a highly opportune time. As the industry begins to recover from a very rough period, companies are starting to step up the ramp of advanced manufacturing operations-making it imperative to address the process flexibility and cost challenges that chipmakers face in providing highly reliable devices in the most cost- and time-efficient manner. Advantest believes a fully open test architecture, supported by vendors throughout the industry, is critical to helping IC makers achieve these objectives. We're proud to be taking a leading role in this effort, and are looking forward to working with the industry's leading device makers and suppliers to establish a truly breakthrough solution."
The current plan is for the founding members to begin reviewing the draft architecture by next month, with the ultimate goal of publishing the architecture and releasing the complete developer's kit-including software, hardware, documentation and training-in the first half of 2003.
Cautionary Note Regarding Forward-looking Statements
This release contains forward-looking statements including, without limitation, Advantest's expectations regarding open architecture test technology solutions resulting from the Semiconductor Test Consortium (STC), the compatibility of the STC's open architecture test technology solutions with current technology, the STC's ability and timing in completing development efforts, the future success of the STC's product and process developments and standards, the STC's long-term plans to collaborate on developing the Semiconductor Test Open Architecture and the commercial availability of STC-developed products, and the ability of certain STC members to support the STC) that involve risks and uncertainties that could cause the results of STC's efforts to differ materially from Advantest's current expectations.
Actual results and events may differ materially due to a number of factors including, among others: future strategic decisions made by Advantest and other STC members; the ability of the STC to achieve the widespread adoption of its standards by leading semiconductor and equipment companies; failure of the STC to enable the production of open architecture test technology solutions that are feasible and are competitive with current products or future alternatives; the viability of the STC's open architecture test technology solutions and other intellectual property; the ability of the STC to complete development of its standards; lack of demand for advanced technology solutions that are developed using the STC's open architecture test technology solutions; cost feasibility of the development and production of solutions using the STC's open architecture test technology solutions; and the rapid pace of technological change in the semiconductor industry. In addition, there can be no assurance that the successful adoption by the semiconductor industry in general of STC's open architecture test technology will not have a materially adverse affect on the results of operations and future financial condition of Advantest. Other risks and uncertainties related to the changes in semiconductor testing technologies and other changes in the semiconductor testing industry can be found in Advantest's most recent filings with the Securities and Exchange Commission. STC members assume no obligation to update the forward-looking information contained in this release.
Note to Editors: Photos from today's press conference announcing the launch of the consortium will be available through MCA. Please contact Dori Jones, (650) 968-8900 ext. 103 or email: djones@mcapr.com.